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The ADAV801 and ADAV803 are stereo codecs intended for applications such as DVD or CD recorders that require high performance. Throughout the application note, ADAV80x refers to the ADAV801 and ADAV803 codecs. One of the features of the ADAV80x is that it contains an integrated S/PDIF receiver. The receiver uses two pins, DIRIN and DIR_LF. DIRIN accepts the S/PDIF input stream. DIR_LF is a loop filter pin, required by the internal PLL, which is used to recover the clock from the S/PDIF data stream.
This application note describes a problem that can occur when the S/PDIF connector is disconnected and reconnected several times successively. The problem can also happen when a nonstandard S/PDIF signal is sent to the DIRIN pin. A solution to this problem is then presented. Finally, an approach to detect when the problem is happening with a microcontroller is proposed.
INITIAL CONDITIONS
Figure 1 presents the recommended components used to form the loop filter connected to the DIR_LF pin. An increase of the loop filter bandwidth results in better jitter performance of the recovered clock. However, it also reduces the stability and locking capability of the PLL. Therefore, those components have been chosen as a trade-off between locking stability and jitter performance.，大小：2.39 MB
The ADAV801 and ADAV803 are stereo codecs intended for applications such as DVD or CD recorders that require high performance. Throughout the application note, ADAV80x refers to the ADAV801 and ADAV803 codecs. One of the features of the ADAV80x is that it contains an integrated S/PDIF receiver. The receiver uses two pins, DIRIN and DIR_LF. DIRIN accepts the S/PDIF input stream. DIR_LF is a loop filter pin, required by the internal PLL, which is used to recover the clock from the S/PDIF data stream.
This application note describes a problem that can occur when the S/PDIF connector is disconnected and reconnected several times successively. The problem can also happen when a nonstandard S/PDIF signal is sent to the DIRIN pin. A solution to this problem is then presented. Finally, an approach to detect when the problem is happening with a microcontroller is proposed.
INITIAL CONDITIONS
Figure 1 presents the recommended components used to form the loop filter connected to the DIR_LF pin. An increase of the loop filter bandwidth results in better jitter performance of the recovered clock. However, it also reduces the stability and locking capability of the PLL. Therefore, those components have been chosen as a trade-off between locking stability and jitter performance.，大小：2.39 MB